Method of polishing semiconductor wafers
US5951374A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 1997 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Jan 28, 2017 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/30
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A method of polishing semiconductor wafers includes a double side primary polishing step and a single side secondary polishing step using a single side polishing machine with a wafer holder including a template so bonded on a carrier plate as having one or more wafer receiving holes in which backing pads are disposed respectively for holding the back sides of the respective wafers fittingly received therein. This method makes it to possible to hold a plurality of wafers at one time due to batch processing to thereby improve the productivity, and decrease extremely the generation of the defective dimples in the front side of the wafer. Compared with conventional single side polishing, the flatness level of the wafer polished with the double side polishing machine in this method is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.