Method for forming high capacitance memory cells
US5981350A · kind A · utility
180Cited by
19References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 29, 1998 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | May 29, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/943
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method and structure for high capacitance memory cells is provided. The method includes forming a trench capacitor in a semiconductor substrate. A self-structured mask is formed on the interior surface of the trench. The interior surface of the trench is etched to form an array of silicon pillars. The self-structured mask is removed. Then an insulator layer is formed on the array of silicon pillars. A polycrystalline semiconductor plate extends outwardly from the insulator layer in the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.