Method and apparatus for checking the resistance of programmable elements
US5982656A · kind A · utility
7Cited by
4References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1997 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | Mar 7, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus are disclosed for checking the resistance of programmable circuits in an integrated circuit where each programmable circuit includes a programmable element, such as an antifuse. A precharged node is connected to the programmable element and the voltage at the node discharges based on the resistance of the programmable element. An output signal is produced whose binary value is based on the voltage at the node after a sufficient time has elapsed to allow the initial voltage to discharge based on the resistance of the programmable element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.