Detection of process-induced damage on transistors in real time
US6005409A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 1996 |
| Grant date | Dec 21, 1999 |
| Priority date | — |
| Expiry date | Jun 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for detecting damage in a plurality of transistors includes measuring at least one characteristic of the plurality of transistors, applying a constant voltage of a predetermined voltage level for a predetermined period of time, and re-measuring the at least one characteristic of the plurality of transistors, wherein a change in the at least one characteristic indicates damage to the plurality of transistors. In one aspect, the predetermined voltage level is about 9 MV/cm, and the predetermined period of time is about 1 second. In a further aspect, measuring at least one characteristic includes measuring threshold voltage, and the change in the at least one characteristic includes a shift in the threshold voltage. In another embodiment, a method for monitoring damage in unprotected plurality of transistors during wafer fabrication includes performing a test sequence including applying a constant voltage of a predetermined voltage level for a predetermined period of time, and utilizing the test sequence in-line with the wafer fabrication. In addition, detecting damage further includes programmably controlling the steps of performing and utilizing during wafer fabrication, wh…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.