Integrated deposition process for copper metallization

US6174811A · kind A · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Peijun Ding · San Jose, US
• Imran Hashim · Saratoga, US
• Barry Chin · Sunnyvale, US
• Bingxi Sun · Sunnyvale, US

Key dates

• Filing date: Dec 2, 1998
• Grant date: Jan 16, 2001
• Expiry date: Dec 2, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76882
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.