Patent · US Expired

Very low thermal budget channel implant process for semiconductors

US6180468A · kind A · utility

23Cited by
9References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 23, 1998
Grant dateJan 30, 2001
Priority date
Expiry dateOct 23, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/0227

Abstract

An ultra-low thermal budget process is provided for channel implant by using a reverse process sequence where a conventional MOS transistor is formed without the channel implant. The originally deposited polysilicon gate is removed, a nitride film deposition and etch is used to form a nitride spacer with a predetermined configuration, and a self-aligned channel implant is performed. After the channel implantation, anneal and super-retrograded doping, the nitride spacer and the gate oxide are removed for subsequent regrowth of a second gate oxide and a polysilicon deposition to form a second polysilicon gate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.