Memory device with command buffer
US6192446A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1998 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Sep 3, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a memory array, a plurality of external lines, a command buffer, and control logic. The plurality of external lines is adapted for receiving an external command. The command buffer is adapted to store at least one command buffer entry. The control logic is coupled to the plurality of external lines and the command buffer. The control logic is adapted to access the memory array based on one of the command buffer entry and the external command. A method for providing commands to a memory device is provided. The memory device includes a command buffer, control logic and a memory array. The method includes reading a first buffered command from the command buffer. The first buffered command is provided to the control logic. The memory array is accessed based on the first buffered command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.