Semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer and method of fabrication thereof
US6268658A · kind A · utility
4Cited by
18References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2000 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Feb 8, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a silicon substrate, an electrical wiring metal, an insulating film formed on the silicon substrate, a plurality of contact holes formed in the insulating film for connecting the silicon substrate and the electrical wiring metal to each other, and a titanium silicide film formed in the contact holes. The thickness of the titanium silicide film is 10 nm to 120 nm or, preferably, 20 nm to 84 nm. Semiconductor regions and the electrical wiring metal are connected to each other through the titanium silicide film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.