Hiromi Abe
36Patents
8h-index
29Co-inventors
75Inventor score
Filing activity: May 4, 1994 → Jul 23, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5904556A | Method for making semiconductor integrated circuit device having interconnection structure using tungsten film | Electricity | 40 | Expired |
| US6031288A | Semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer and method of fabrication thereof | Electricity | 25 | Expired |
| US6989600B2 | Integrated circuit device having reduced substrate size and a method for manufacturing the same | Electricity | 25 | Expired |
| US6300206A | Method for manufacturing semiconductor device | Electricity | 13 | Expired |
| US6780757B2 | Semiconductor integrated circuit device and method for making the same | Electricity | 12 | Expired |
| US8101433B2 | Semiconductor device and manufacturing method of the same | Electricity | 10 | Active |
| US6861344B2 | Method of manufacturing a semiconductor integrated circuit device | Electricity | 9 | Expired |
| US6693001B2 | Process for producing semiconductor integrated circuit device | Electricity | 8 | Expired |
| US6503803B2 | Method of fabricating a semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer | Electricity | 8 | Expired |
| US6610564B2 | Method of fabricating semiconductor device | Electricity | 7 | Expired |
| US6545326B2 | Method of fabricating semiconductor device | Electricity | 4 | Expired |
| US6268658A | Semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer and method of fabrication thereof | Electricity | 4 | Expired |
| US7094655B2 | Method of fabricating semiconductor device | Electricity | 4 | Expired |
| US6670251B2 | Method of fabricating semiconductor device | Electricity | 3 | Expired |
| US9646901B2 | Semiconductor device with bond pad wiring lead-out arrangement avoiding bond pad probe mark area | Electricity | 3 | Active |
| US10566255B2 | Method of manufacturing semiconductor device | Electricity | 2 | Active |
| US6583049B2 | Semiconductor integrated circuit device and method for making the same | Electricity | 2 | Expired |
| US6300237A | Semiconductor integrated circuit device and method for making the same | Electricity | 2 | Expired |
| US7569457B2 | Method of fabricating semiconductor device | Electricity | 2 | Active |
| US6858484B2 | Method of fabricating semiconductor integrated circuit device | Electricity | 2 | Expired |
| US7314830B2 | Method of fabricating semiconductor integrated circuit device with 99.99 wt% cobalt | Electricity | 1 | Active |
| US5453760A | Position detecting apparatus | Physics | 1 | Expired |
| US7553766B2 | Method of fabricating semiconductor integrated circuit device | Electricity | 1 | Active |
| US8912540B2 | Semiconductor device | Electricity | 1 | Active |
| US9911673B2 | Semiconductor device with bond pad wiring lead-out arrangement avoiding bond pad probe mark area | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.