Method of programming a non-volatile memory cell using a current limiter
US6269023A · kind A · utility
139Cited by
2References
21Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 23, 2000 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Oct 23, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0475
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell that includes a substrate that has a first region and a second region with a channel therebetween, wherein the first region generates hot carriers. The memory cell further includes a gate above the channel and a charge trapping region that contains a first amount of charge. A current limiter that limits the number of the generated hot carriers that can flow into the channel, wherein the current limiter does not control the voltage of the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.