Semiconductor integrated circuit device and process for manufacturing the same
US6291847A · kind A · utility
20Cited by
1References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1998 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | Sep 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
Abstract
A field oxide film 3 in a region where relief cells are formed is made wider than the field oxide film 3 in a region where normal memory cells are formed thereby to make a field relaxation layer 8r of the relief cells deeper than the field relaxation layer 8 of the normal cells, and the depletion layer of the sources and drains (n-type semiconductor regions) of the relief cells is widened to weaken the junction field.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.