Method to eliminate top metal corner shaping during bottom metal patterning for MIM capacitors via plasma ashing and hard masking technique
US6319767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2001 |
| Grant date | Nov 20, 2001 |
| Priority date | — |
| Expiry date | Mar 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a metal-insulator-metal capacitor wherein top metal corner shaping during patterning is eliminated is described. An insulating layer is provided overlying a semiconductor substrate. A composite metal stack is formed comprising a first metal layer overlying the insulating layer, a capacitor dielectric layer overlying the first metal layer, a second metal layer overlying the capacitor dielectric layer, and a hard mask layer overlying the second metal layer. A first photoresist mask is formed overlying the hard mask layer. The composite metal stack is patterned using the first photoresist mask as an etching mask whereby the patterned first metal layer forms a bottom electrode of the capacitor. A portion of the first photoresist mask is removed by plasma ashing to form a second photoresist mask narrower than the first photoresist mask. The hard mask layer is patterned using the second photoresist mask as an etching mask. The second metal layer is patterned using the hard mask layer as an etching mask whereby the second metal layer forms a top electrode of the capacitor to complete fabrication of a metal-insulator-metal capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.