Method of depositing amorphous silicon based films having controlled conductivity
US6352910B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1999 |
| Grant date | Mar 5, 2002 |
| Priority date | — |
| Expiry date | Feb 12, 2019 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC23C16/24
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Deposition methods for preparing amorphous silicon based films with controlled resistivity and low stress are described. Such films can be used as the interlayer in FED manufacturing. They can also be used in other electronic devices which require films with controlled resistivity in the range between those of an insulator and of a conductor. The deposition methods described in the present invention employ the method of chemical vapor deposition or plasma-enhanced chemical vapor deposition; other film deposition techniques, such as physical vapor deposition, also may be used. In one embodiment, an amorphous silicon-based film is formed by introducing into a deposition chamber a silicon-based volatile, a conductivity-increasing volatile including one or more components for increasing the conductivity of the amorphous silicon-based film, and a conductivity-decreasing volatile including one or more components for decreasing the conductivity of the amorphous silicon-based film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.