Formation of low thermal budget shallow abrupt junctions for semiconductor devices
US6362063B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1999 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Jan 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/022
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A shallow abrupt junction is formed in a single crystal substrate, for example, to form a pn junction in a diode or a source drain extension in a transistor. An amorphous layer is formed at the surface of the substrate by implanting an electrically inactive ion, such as germanium or silicon, into the substrate. The amorphous/crystalline interface between the amorphous layer and the base crystal substrate is located at the depth of the desired junction. A dopant species, such as boron, phosphorus or arsenic is implanted into the substrate so that peak concentration of the dopant is at least partially within the amorphous layer. The amorphous layer can be formed either before or after the implanting of the dopant species. A low temperature anneal is used to recrystallize the amorphous layer through solid phase epitaxy, which also activates the dopant within the amorphous layer. The dopant located beneath the original amorphous/crystalline interface remains inactive. Thus, an abrupt junction is formed at the depth of the original amorphous/crystalline interface. Formation of such a shallow abrupt junction is useful in devices such as diodes and transistors, including bipolar, MOSFET a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.