Process to produce ultrathin crystalline silicon nitride on Si (111) for advanced gate dielectrics
US6420729B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2000 |
| Grant date | Jul 16, 2002 |
| Priority date | — |
| Expiry date | Jan 17, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a semiconductor device and the device. The device, according to a first embodiment, is fabricated by providing a silicon (111) surface, forming on the surface a dielectric layer of crystalline silicon nitride and forming an electrode layer on the dielectric layer of silicon nitride. The silicon (111) surface is cleaned and made atomically flat. The dielectric layer if formed of crystalline silicon nitride by placing the surface in an ammonia ambient at a pressure of from about 1×10−7 to about 1×10−5 Torr at a temperature of from about 850° C. to about 1000° C. The electrode layer is heavily doped silicon. According to a second embodiment, there is provided a silicon (111) surface on which is formed a first dielectric layer of crystalline silicon nitride having a thickness of about 2 monolayers. A second dielectric layer compatible with silicon nitride and having a higher dielectric constant than silicon nitride is formed on the first dielectric layer and an electrode layer is formed over the second dielectric layer. A third dielectric layer of silicon nitride having a thickness of about 2 monolayers can be formed between the second…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.