Semiconductor wafer processing method and semiconductor wafers produced by the same
US6432837B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2001 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Feb 7, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching. The method can remove a mechanically formed damage layer, improve surface roughness, and efficiently decrease the depth of locally formed deep pits, while the flatness of the wafer attained through lapping is maintained, in order to produce a chemically etched wafer having a smooth and flat etched surface that hardly causes generation particles and contamination.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.