Method for filling high aspect ratio via holes in electronic substrates and the resulting holes
US6452117B2 · kind B2 · utility
41Cited by
19References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 31, 2001 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | May 31, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53191
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
High aspect ratio (5:1-30:1) and small (5 &mgr;m-125 &mgr;m) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodiments, the holes are lined with conductive material and/or capped with a conductive material. The invention also contemplates a chip carrier formed by such material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.