Patent · US Expired

Select transistor architecture for a virtual ground non-volatile memory cell array

US6477083B1 · kind B1 · utility

13Cited by

21References

7Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Richard Fastow · Cupertino, US
Mark Randolph · San Jose, US
Shane Hollmer · Grass Valley, US

Key dates

Filing date	Oct 11, 2000
Grant date	Nov 5, 2002
Priority date	—
Expiry date	Oct 11, 2020

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/14
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A bit line selector for a virtual ground non-volatile read only memory (“NROM”) cell array is disclosed. The selector transistors are oriented such that the channel length is perpendicular to the bit line and the channel width is parallel to the bit line. Subsequent reduction in the bit line pitch does not affect the channel width of the select transistors or their drive current.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.