Method of making memory wordline hard mask extension
US6479348B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 27, 2002 |
| Grant date | Nov 12, 2002 |
| Priority date | — |
| Expiry date | Aug 27, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A manufacturing method is provided for an integrated circuit memory with closely spaced wordlines formed by using hard mask extensions. A charge-trapping dielectric material is deposited over a semiconductor substrate and first and second bitlines are formed therein. A wordline material and a hard mask material are deposited over the wordline material. A photoresist material is deposited over the hard mask material and is processed to form a patterned photoresist material. The hard mask material is processed using the patterned photoresist material to form a patterned hard mask material. The patterned photoresist is then removed. A hard mask extension material is deposited over the wordline material and is processed to form a hard mask extension. The wordline material is processed using the patterned hard mask material and the hard mask extension to form a wordline, and the patterned hard mask material and the hard mask extension are then removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.