Stacked LDD high frequency LDMOSFET

US6489203B2 · kind B2 · utility

Assignee

• Institute of Microelectronics · SG

Inventors

• Jun Cai · Allen, US
• Pang Dow Foo · Singapore, SG
• Narayanan Balasubramanian · Singapore, SG

Key dates

• Filing date: May 7, 2001
• Grant date: Dec 3, 2002
• Expiry date: May 7, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/111

Abstract

A novel silicon RF LDMOSFET structure based on the use of a stacked LDD, is disclosed. The LDD has been modified from a single layer of N type material to a stack of three layers. These are upper and lower N type layers with a P type layer between them. The upper N type layer is heavily doped to reduce the on-resistance of the device, while the lower N type layer is lightly doped to reduce the output capacitance, thereby improving the high frequency performance. The middle P layer is heavily doped which allows it to bring about pinch-off of the two N layers, thereby raising the device's breakdown voltage. A process for manufacturing the device, as well as experimental data concerning its performance are also given.