Inventor · Singapore, SG

Narayanan Balasubramanian

15Patents
7h-index
28Co-inventors
62Inventor score

Filing activity: Apr 22, 1996 → Oct 30, 2007

Most-cited inventions

PatentTitleAreaCited byStatus
US5767004A Method for forming a low impurity diffusion polysilicon layer Electricity 88 Expired
US6468853B1 Method of fabricating a shallow trench isolation structure with reduced local oxide recess near corner Electricity 42 Expired
US6235591A Method to form gate oxides of different thicknesses on a silicon substrate Electricity 30 Expired
US7316950B2 Method of fabricating a CMOS device with dual metal gate electrodes Electricity 16 Expired
US7294890B2 Fully salicided (FUSA) MOSFET structure Electricity 16 Expired
US6846720B2 Method to reduce junction leakage current in strained silicon on silicon-germanium devices Electricity 12 Expired
US6551937B2 Process for device using partial SOI Electricity 12 Expired
US7425751B2 Method to reduce junction leakage current in strained silicon on silicon-germanium devices Electricity 7 Expired
US8236595B2 Nanowire sensor, nanowire sensor array and method of fabricating the same Emerging Cross-Sectional Technologies 7 Active
US6200887A Method to form a smooth gate polysilicon sidewall in the fabrication of integrated circuits Electricity 6 Expired
US7397090B2 Gate electrode architecture for improved work function tuning and method of manufacture Electricity 5 Active
US7682914B2 Fully salicided (FUCA) MOSFET structure Electricity 5 Active
US6489203B2 Stacked LDD high frequency LDMOSFET Electricity 5 Expired
US7439165B2 Method of fabricating tensile strained layers and compressive strain layers for a CMOS device Electricity 3 Active
US6664596B2 Stacked LDD high frequency LDMOSFET Electricity 2 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.