Substrate structure for an integrated circuit package and method for manufacturing the same
US6489572B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2001 |
| Grant date | Dec 3, 2002 |
| Priority date | — |
| Expiry date | Jan 23, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T156/109
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained. A method for manufacturing the substrate is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.