Semiconductor device and process for producing the sme
US6559027B2 · kind B2 · utility
15Cited by
9References
7Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | May 1, 2001 |
| Grant date | May 6, 2003 |
| Priority date | — |
| Expiry date | May 1, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.