Integrated deposition process for copper metallization

US6566259B1 · kind B1 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Peijun Ding · San Jose, US
• Imran Hashim · Saratoga, US
• Barry Chin · Sunnyvale, US
• Bingxi Sun · Sunnyvale, US

Key dates

• Filing date: Nov 9, 2000
• Grant date: May 20, 2003
• Expiry date: Nov 21, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76882
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.