Method and apparatus for accelerated determination of electromigration characteristics of semiconductor wiring

US6603321B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Ronald G. Filippi · Wappingers Falls, US
• Alvin W. Strong · South Burlington, US
• Timothy D. Sullivan · Batavia, US
• Deborah Tibel · South Burlington, US
• Michael Ruprecht · Landsberg am Lech, DE
• Carole D. Graas · Jericho, US

Key dates

• Filing date: Oct 26, 2001
• Grant date: Aug 5, 2003
• Expiry date: Oct 26, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3011
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A method for determining the electromigration characteristics of a wiring structure in an integrated circuit device is disclosed. In an exemplary embodiment of the invention, the method includes configuring a defined test structure type for the integrated circuit device. The defined test structure type further includes a first line of wiring primarily disposed in a principal plane of a semiconductor substrate, and a second line of wiring connected to the first line of wiring. The second line of wiring is disposed in a secondary plane which is substantially parallel to the principal plane, with the first and second lines of wiring being connected by a via structure therebetween. A thermal coefficient of resistance for the first line of wiring and the via structure is determined, and a wafer-level stress condition is introduced in a first individual test structure of the defined test structure type. Then, at least one parameter value for is determined for the first individual test structure, which parameter value is used to predict a lifetime projection for the wiring structure in the integrated circuit device.