Method for ultra thin resist linewidth reduction using implantation
US6642152B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2001 |
| Grant date | Nov 4, 2003 |
| Priority date | — |
| Expiry date | Aug 16, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0276
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a system and a method for reducing the linewidth of ultra thin resist features. The present invention accomplishes this end by applying a densification process to an ultra thin resist having a thickness of less than about 2500 å formed over a semiconductor structure. In one aspect of the present invention, the method includes providing a semiconductor substrate having a device film layer formed thereon. An ultra thin resist is then deposited over the device film layer. The ultra thin resist is patterned according to a desired structure or feature using conventional photolithography techniques. Following development, the ultra thin resist is implanted with a dopant. After the implantation is substantially completed, the device film layer is anisotropically etched.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.