Method of eliminating back-end rerouting in ball grid array packaging
US6720212B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2002 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Mar 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of ball grid array packaging, comprising the steps of providing a semiconductor die having a metal conductors thereon, covering said metal conductors with an insulative layer, etching through said insulative layer so as to provide one or more openings to said metal conductors, depositing a compliant material layer, etching through said compliant material layer so as to provide one or more openings to said metal conductors, depositing a substantially homogenous conductive layer, patterning said conductive layer so as to bring at least one of said metal conductors in electrical contact with one or more pads, each said pad comprising a portion of said conductive layer disposed upon said compliant material, and providing solder balls disposed upon said pads. Also disclosed is the apparatus made from the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.