Method of improving dynamic reference tracking for flash memory unit
US6735114B1 · kind B1 · utility
37Cited by
18References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 4, 2003 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Feb 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a memory unit having a plurality of dual cell core memory devices and at least one dual cell dynamic reference device. The memory unit is subjected to an erase configuration operation such that each cell of the core memory devices is in a blank state and such that a threshold voltage of the at least one dynamic reference device is less than a charged program level threshold voltage. Thereafter, the at least one dynamic reference and the core memory devices are programmed using a page programming routine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.