Nonvolatile memory cell with a nitridated oxide layer
US6750157B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Aug 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02186
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One aspect of the present invention relates to a system and method for improving memory retention in flash memory devices. Retention characteristics may be enhanced by nitridating the bottom silicon dioxide layer of the ONO dielectric. To further mitigate charge leakage within the memory cell, the charge retention layer, or silicon nitride layer of the ONO dielectric, may be passivated via a hydrogen anneal process in order to reduce the number of charge traps, and thus, the amount of charge loss. The present invention also provides a monitoring and feedback-relay system to automatically control ONO formation such that a desired ONO dielectric stack is obtained. The present invention may be accomplished in part by employing a measurement system to measure properties and characteristics of the ONO stack during the critical formation steps of the bottom silicon dioxide layer and a silicon nitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.