Method for forming dual damascene interconnect structure
US6756300B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2002 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Jan 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76813
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
For forming a dual damascene opening within a dielectric material, a via mask material and a trench mask material are formed over the dielectric material. A trench opening is formed through the trench mask material, and a via opening is formed through a via mask patterning material disposed over the via and trench mask materials. The via and trench mask materials exposed through the via opening of the via mask patterning material are etched away, and the via mask patterning material is etched away. A portion of the dielectric material exposed through the via opening is etched down to the underlying interconnect structure, and a portion of the dielectric material exposed through the trench opening is etched, to form the dual damascene opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.