Method of testing the thin oxide of a semiconductor memory cell that uses breakdown voltage
US6791891B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2003 |
| Grant date | Sep 14, 2004 |
| Priority date | — |
| Expiry date | Apr 2, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of testing a memory cell is disclosed. The memory cell has a data storage element constructed around an ultra-thin dielectric, such as a gate oxide, which is used to store information by stressing the ultra-thin dielectric into breakdown (soft or hard breakdown) to set the leakage current level of the memory cell. In order to ensure that the gate oxide underlying the data storage elements are of sufficient quality for programming, the memory cells of a memory array may be tested by applying a voltage across the gate oxide of the data storage element and measuring the current flow. Resultant current flow outside of a predetermined range indicates a defective memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.