Circuit for programming antifuse bits
US6826071B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2002 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Jul 5, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of verifying whether unprogrammed antifuses are leaky in a semiconductor memory. The method involves the steps of: connecting the antifuse in series with a node; providing current to the node, the current being sufficient to charge the node from a first to a second voltage; detecting whether the voltage at the node charges to the second voltage, or remains at the first voltage to indicate that the antifuse is leaky; outputting signals indicating the result of the detection; and detecting the voltage at the node remains at the first voltage indicates that the antifuse is leaky. In another embodiment, a method of verifying whether antifuses have been programmed properly in a semiconductor memory. The method includes the steps of: connecting the antifuse in series with a node; providing current to the node through a parallel combination of a first transistor and a second transistor that is sufficient to charge the node from a first voltage to a second voltage; and detecting whether the voltage at the node charges to the second voltage or remains at the first voltage to indicate that the antifuse is programmed properly; outputting first and second signals indicating the result…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.