System and method of forming a passive layer by a CMP process
US6836398B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2002 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Oct 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K71/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides systems and methods that facilitate formation of semiconductor devices via planarization processes. The present invention utilizes dishing effects that typically occur during a chemical mechanical planarization (CMP) process. A reducing CMP process is performed on a semiconductor device in order to form a passive layer instead of performing a first CMP, followed by a deposition and a second CMP to form a passive layer. The reducing CMP process utilizes a slurry that includes a reducing chemistry that forms the passive layer in a dish region of an electrode. Thus, the passive layer is formed in conjunction with the reducing CMP process utilized for forming the electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.