Polysilicon tilting to prevent geometry effects during laser thermal annealing
US6867080B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2003 |
| Grant date | Mar 15, 2005 |
| Priority date | — |
| Expiry date | Jun 13, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/926
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for eliminating uneven heating of substrate active areas during laser thermal annealing (LTA) due to variations in gate electrode density. Embodiments include adding dummy structures, formed simultaneously with the gate electrodes, to “fill in” the spaces between isolated gate electrodes, such that the spacing between the gate electrodes and the dummy structures is the same as the spacing between the densest array of device structures on the substrate surface. Since the surface features (i.e., the gate electrodes and the dummy structures) appear substantially uniform to the LTA laser, the laser radiation is uniformly absorbed by the substrate, and the substrate surface is evenly heated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.