Integrated deposition process for copper metallization
US6881673B2 · kind B2 · utility
3Cited by
39References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 22, 2003 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Apr 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76882
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.