Advances in spike anneal processes for ultra shallow junctions

US6897131B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Balasubramanian Ramachandran · Santa Clara, US
• Ravi Jallepally · Santa Clara, US
• Ryan Boas · Watertown, US
• Sundar Ramamurthy · Fremont, US
• Amir Al-Bayati · San Jose, US
• Houda Graoui · Gilroy, US
• Joseph M. Spear · Portland, US

Key dates

• Filing date: Sep 22, 2003
• Grant date: May 24, 2005
• Expiry date: Sep 22, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/67115
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Lamp based spike annealing was improved to address the aggressive requirements of <100 nm Ultra Shallow Junction (USJ) technologies. Improvements focused on enhancing cool down rates, and thereby improving spike sharpness. Boron ion implanted substrates with varying ion-implanted energy and dose were then annealed to characterize the improvements in spike annealing. A greater than 10% improvement in sheet resistance and junction depth was realized on substrates that were annealed with the improved spike profile. The improved spike anneal had the same comparable uniformity to the standard spike anneal.