Method of manufacturing a semiconductor integrated circuit device including a gate electrode having a salicide layer thereon
US6908837B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2002 |
| Grant date | Jun 21, 2005 |
| Priority date | — |
| Expiry date | Apr 12, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor integrated circuit device includes the steps of depositing a first insulating film over a first conductive layer, patterning the first insulating film by using a resist film as a mask to form a cap film, and removing the resist film. After which, a gate electrode of a MISFET is formed by etching the first conductive layer using the cap film as a mask. A second insulating film is deposited over the gate electrode and the cap film and a side wall spacer formed on side surfaces of the gate electrode by etching the second insulating film. After which, a salicide layer is selectively formed on the gate electrode. The cap film is removed by over-etching the first insulating film to etch the cap film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.