Multiple deposition of metal layers for the fabrication of an upper capacitor electrode of a trench capacitor
US6916704B2 · kind B2 · utility
2Cited by
6References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2002 |
| Grant date | Jul 12, 2005 |
| Priority date | — |
| Expiry date | Aug 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/665
Abstract
An upper capacitor electrode of a trench capacitor of a DRAM memory cell is formed at least in part as a result of a plurality of metal-containing layers being deposited one on top of another and in each case being conditioned after they have been deposited. In this way, the internal stress of the electrode layer can be reduced, and therefore a breaking strength and a resistance to leakage currents of the trench capacitor can be increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.