Circuit device with at least partial packaging, exposed active surface and a voltage reference plane
US6921975B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2003 |
| Grant date | Jul 26, 2005 |
| Priority date | — |
| Expiry date | Apr 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit device (15) is placed within an opening of a conductive layer (10) which is then partially encapsulated with an encapsulant (24) so that the active surface of the circuit device (15) is coplanar with the conductive layer (10). At least a portion of the conductive layer (10) may be used as a reference voltage plane (e.g. a ground plane). Additionally, a circuit device (115) may be placed on a conductive layer (100) such that an active surface of circuit device (115) is between conductive layer (100) and an opposite surface of circuit device (115). The conductive layer (100) has at least one opening (128) to expose the active surface of circuit device (115). The encapsulant (24, 126,326) may be electrically conductive or electrically non-conductive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.