Method and structure for small pitch z-axis electrical interconnections
US6955849B2 · kind B2 · utility
3Cited by
7References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 2004 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | May 26, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/2848
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.