Method to engineer the inverse narrow width effect (INWE) in CMOS technology using shallow trench isolation (STI)
US7045436B2 · kind B2 · utility
9Cited by
20References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2004 |
| Grant date | May 16, 2006 |
| Priority date | — |
| Expiry date | Jul 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method (200) of forming an isolation structure is disclosed, and includes forming an isolation trench in a semiconductor body (214) associated with an isolation region, and filling a bottom portion of the isolation trench with an implant masking material (216). An angled ion implant is performed into the isolation trench (218) after having the bottom portion thereof filled with the implant masking material, thereby forming a threshold voltage compensation region in the semiconductor body. Subsequently, the isolation trench is filled with a dielectric material (220).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.