Method and apparatus for implementing silicon wafer chip carrier passive devices
US7050871B2 · kind B2 · utility
8Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2004 |
| Grant date | May 23, 2006 |
| Priority date | — |
| Expiry date | Jul 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for implementing silicon wafer chip carrier passive devices including customized silicon capacitors and resistors mounted directly on a module or carrier package. A plurality of system design inputs is received for a package arrangement. A respective physical design is generated for customized passive devices, a logic chip, and a chip carrier. Silicon devices are fabricated utilizing the generated respective physical design for customized passive devices and the logic chip and a carrier package is fabricated. The fabricated silicon devices are assembled on the carrier package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.