Memory cell and method for fabricating it

US7144770B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Albert Birner · Regensburg, DE
• Matthias Foerster · Dresden, DE
• Thomas Hecht · Dresden, DE
• Michael Stadtmueller · Villach, AT
• Andreas Orth · Friedrichsdorf, DE

Key dates

• Filing date: Nov 3, 2004
• Grant date: Dec 5, 2006
• Expiry date: Jun 15, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/665

Abstract

The invention provides a method for fabricating a memory cell, a substrate (101) being provided, a trench-type depression (102) being etched into the substrate (101), a barrier layer (103) being deposited non-conformally in the trench-type depression (102), grain elements (104) being grown on the inner areas of the trench-type depression (102), a dielectric layer (202) being deposited on the surfaces of the grain elements and the inner areas of the trench-type depression, and a conduction layer being deposited on the dielectric layer, the grain elements (104) growing selectively on the inner areas (105) of the trench-type depression (102) in an electrode region (301) forming a lower region of the trench-type depression (102) and an amorphous silicon layer continuing to grow in a collar region (302) forming an upper region of the trench-type depression (102).