Multi-chip semiconductor connector assembly method
US7202105B2 · kind B2 · utility
5Cited by
17References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2004 |
| Grant date | Apr 10, 2007 |
| Priority date | — |
| Expiry date | Aug 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.