Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same

US7208397B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Thomas Feudel · Radebeul, DE
• Manfred Horstmann · Dresden, DE
• Markus Lenski · Dresden, DE

Key dates

• Filing date: May 5, 2005
• Grant date: Apr 24, 2007
• Expiry date: Jun 11, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

By providing an asymmetric design of a halo region and extension regions of a field effect transistor, the transistor performance may significantly be enhanced for a given basic transistor architecture. In particular, a large overlap area may be created at the source side with a steep concentration gradient of the PN junction due to the provision of the halo region, whereas the drain overlap may be significantly reduced or may even completely be avoided, wherein a moderately reduced concentration gradient may further enhance the transistor performance.