Non-volatile memory device with increased reliability
US7238571B1 · kind B1 · utility
2Cited by
1References
18Claims
0Family size
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Key dates
| Filing date | Feb 24, 2005 |
| Grant date | Jul 3, 2007 |
| Priority date | — |
| Expiry date | Jun 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
Abstract
A memory device may include a number of memory cells, a first interlayer dielectric formed over the memory cells and at least one metal layer formed over the interlayer dielectric. A dielectric layer may be formed over the metal layer. The dielectric layer may represent a cap layer formed at or near an upper surface of the memory device and may be deposited at a relatively low temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.