pHEMT with barrier optimized for low temperature operation
US7253455B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2005 |
| Grant date | Aug 7, 2007 |
| Priority date | — |
| Expiry date | Nov 5, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/4738
Abstract
In one embodiment, a semiconductor device (500) includes a buffer layer (504) formed over a substrate (502). An AlxGa1−xAs layer (506) is formed over the buffer layer (504) and has a first doped region (508) formed therein. An InxGa1−xAs channel layer (512) is formed over the AlxGa1−xAs layer (506). An AlxGa1−xAs layer (518) is formed over the InxGa1−xAs channel layer (512), and the AlxGa1−xAs layer (518) has a second doped region formed therein. A GaAs layer (520) having a first recess is formed over the AlxGa1−xAs layer (518). A control electrode (526) is formed over the AlxGa1−xAs layer (518). A doped GaAs layer (524) is formed over the undoped GaAs layer (520) and on opposite sides of the control electrode (526) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device (500) maintains linear operation over a wide temperature range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.