Interface engineering to improve adhesion between low k stacks

US7259111B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Deenesh Padhi · Sunnyvale, US
• Ganesh Balasubramanian · Sunnyvale, US
• Annamalai Lakshmanan · Fremont, US
• Zhenjiang Cui · San Jose, US
• Juan Carlos Rocha-Alvarez · Redwood City, US
• Bok Hoen Kim · San Jose, US
• Hichem M'Saad · Santa Clara, US
• Steven Reiter · Poughkeepsie, US
• Francimar Schmitt · Santa Clara, US

Key dates

• Filing date: Jun 1, 2005
• Grant date: Aug 21, 2007
• Expiry date: Jun 1, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02274
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method of depositing a organosilicate dielectric layer exhibiting high adhesion strength to an underlying substrate disposed within a single processing chamber without plasma arcing. The method includes positioning a substrate within a processing chamber having a powered electrode, flowing an interface gas mixture into the processing chamber, the interface gas mixture comprising one or more organosilicon compounds and one or more oxidizing gases, depositing a silicon oxide layer on the substrate by varying process conditions, wherein DC bias of the powered electrode varies less than 60 volts.