Void free interlayer dielectric
US7307027B1 · kind B1 · utility
1Cited by
1References
11Claims
0Family size
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Key dates
| Filing date | Aug 11, 2005 |
| Grant date | Dec 11, 2007 |
| Priority date | — |
| Expiry date | Jan 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a dielectric between memory cells in a device includes forming multiple memory cells, where a gap is formed between each of the multiple memory cells. The method further includes performing a high density plasma deposition (HDP) process to fill at least a portion of the gap between each of the multiple memory cells with a dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.