Method of fabricating semiconductor integrated circuit device with 99.99 wt% cobalt
US7314830B2 · kind B2 · utility
1Cited by
20References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2007 |
| Grant date | Jan 1, 2008 |
| Priority date | — |
| Expiry date | Apr 6, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A Co silicide layer having a low resistance and a small junction leakage current is formed on the surface of the gate electrode, source and drain of MOSFETS by silicidizing a Co film deposited on a main plane of a wafer by sputtering using a high purity Co target having a Co purity of at least 99.99% and Fe and Ni contents of not greater than 10 ppm, preferably having a Co purity of 99.999%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.